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ec 24c02a/04a/08a/16a 2k/4k/8k/16k - bit 2 - wire serial cmos eeprom e - cmos corp. ( www.ecmos.com.tw ) page 1 of 18 5h06n - rev.f004 description features the ec24c02a/04a/08a/16a provides 2048/4096 /8192/16384 bits of serial electrically erasable and programmable read - only memory (eeprom) org - anized as 256/512/1024/2048 words of 8 bits each. the device is optimized for use in man y industrial and commercial applications where low - power and low - voltage operation are essential. the ec24c02a/04 a/08a/16a is available in space s aving pdip - 8, sop - 8, tssop - 8, msop8, dfn - 8 and sot23 - 5 packages and is acc essed via a two - wire serial int erfa ce. ? wide voltage operation - v cc = 1. 7 v to 5.5v ? oper ating ambient temperature: - 40 c to +85 c ? internally organized: - ec 24c02a , 256 x 8 (2k bits) - ec 24c04a , 512 x 8 (4k bits) - ec 24c08a , 1024 x 8 (8k bits) - ec 24c16a , 2048 x 8 ( 16 k bits) ? t wo - wir e serial interface ? schmitt trigger, filtered inputs for noise suppression ? bidirectional data transfer protocol ? 1 mhz (5v), 400 khz (1. 7 v, 2.5v, 2.7v) compatibility ? write protect pin for hardware data protection ? 8 - byte page (2k), 16 - byte page (4k, 8k ,16k ) write modes ? partial page writes allowed ? self - timed write cycle (5 ms max) ? high - reliability - endurance: 1 million write cycles - data retention: 100 years ? pdip - 8 , sop - 8 , tssop - 8 , msop - 8, dfn - 8 and sot23 - 5 packages p in configuration sop - 8 tssop - 8 dfn - 8 sot23 - 5 ( ec24c02a/04a/08a/16a ) ( ec24c02a/04a/08a/16a ) ( ec24c02a/04a/08a/16a ) ( ec24c02a/04a/08a ) top - v iew top - v iew bottom view top - v iew pdip - 8 msop - 8 ( ec24c02a/04a/08a/16a ) ( ec24c02a/04a/08a/16a ) top - v iew top - v iew pin name functions a0 - a2 address inputs sda serial data scl serial clock input wp write protect gnd ground v cc power supply
ec 24c02a/04a/08a/16a 2k/4k/8k/16k - bit 2 - wire serial cmos eeprom e - cmos corp. ( www.ecmos.com.tw ) page 2 of 18 5h06n - rev.f004 block diagram
ec 24c02a/04a/08a/16a 2k/4k/8k/16k - bit 2 - wire serial cmos eeprom e - cmos corp. ( www.ecmos.com.tw ) page 3 of 18 5h06n - rev.f004 pin descriptions device/page addresses (a2, a1 and a0): the a2, a1 and a0 pins are device address inputs that are hard - wired for the ec 24c02a . eight 2k devices may be addressed on a single bus system (device addressing is discussed in detail under the device addressing section). the ec 24c04a use s the a2 and a1 inputs for hard - wire d addressing and a total of f our 4k devices may be addressed on a single bus system. the a0 (p0) pin is a no connect ion or can be connected to ground. the ec 24c08a only uses the a2 input for hard - wire d addressing and a total of two 8k devices may be addressed on a single bus system. t he a0 (p0) and a1 (p1) pins are no connect ion s or can be connected to ground. the ec 24c16 a does not use the device address pins, which limits the number of devices on a single bus to one. the a0 (p0) , a1 (p1) , and a2 (p2) pins are no connect ion s or can be connected to ground. serial data (sda): the sda pin is bi - directional for serial data transfer. this pin is open - drain driven and may be wire - ored with any number of other open - drain or open - collector devices. serial clock (scl): the scl input is used to positive edge clock data into each eeprom device and negative edge clock data out of each device. write protect (wp): the ec 24c02 a /04 a /08a /16a has a write protect pin that provides hardware data protection. the write protect pin allows normal read/wr ite operations when connected to ground (gnd). when the write protect pin is connected to v cc , the write protection feature is enabled and operates as shown in the following . write protect wp pin status part of the array protected ec 24c02a ec 24c04a e c 24c08a ec 24c16a at v cc full (2k) array full (4k) array full (8k) array full ( 16 k) array at gnd normal read / write operations ordering information
ec 24c02a/04a/08a/16a 2k/4k/8k/16k - bit 2 - wire serial cmos eeprom e - cmos corp. ( www.ecmos.com.tw ) page 4 of 18 5h06n - rev.f004 available package types part number sop - 8 tssop - 8 dfn - 8 sot23 - 5 msop - 8 pdip - 8 ec24c02a v v v v v v ec24c04a v v v v v v ec24c08a v v v v v v ec24c16 a v v v -- v v marking information package type part number marking marking information pdip - 8 EC24CXXANP1GX 24cxx a lllll yyww t xx is the memory of production . lllll is the l as t five number s of wafer lot number y yww is date code . t is tracking code ,t=x sop - 8 ec24cxxanm1 g x tssop - 8 ec24cxxane1 g x msop - 8 ec24cxxanr1gx sot23 - 5 ec24cxxan b 2 g x 24cxx a lllll xx is the memory of production. lllll is the l as t fi ve number s of wafer lot number dfn - 8 ec24cxxanf2 g x cxxa llll xx is the memory of production. llll is the l as t four number s of wafer lot number memory or ga n i z a t i on ec 24c02 a , 2k serial eeprom: internally organized with 32 pages of 8 bytes each, the 2k r equires an 8 - bit data word address for random word addressing. ec 24c04 a , 4k serial eeprom: internally organized with 32 pages of 16 bytes each, the 4k requires a 9 - bit data word address for random word addressing. ec 24c08 a , 8k serial eeprom: internal ly organized with 64 pages of 16 bytes each, the 8k requires a 10 - bit data word address for random word addressing. ec 24c16, 16k serial eeprom: internally organized with 128 pages of 16 bytes each, the 16k requires an 11 - bit data word address for random word addressing. device operation clock and data transitions: the sda pin is normally pulled high with an external device. data on the sda pin may change only during scl lo w time periods (see to figure 1 ). data changes during scl high periods will ind icate a start or stop condition as defined below . start condition: a high - to - low transition of sda with scl high is a start condition which must precede any other command (see to figure 2). stop condition: a low - to - high transition of sda with scl high is a stop condition. after a read sequence, the stop command will place the eeprom in a standby power mode (see to figure 2 ). acknowledge: all addresses and data words are serially transmitted to and from the eeprom in 8 - bit words. the eeprom sends a "0" to acknowledge that it has received each word. this happens during the ninth clock cycle (see to figure 3) .
ec 24c02a/04a/08a/16a 2k/4k/8k/16k - bit 2 - wire serial cmos eeprom e - cmos corp. ( www.ecmos.com.tw ) page 5 of 18 5h06n - rev.f004 standby mode: the ec 24c02 a /04 a /08a /16a features a low - power standby mode which is enabled: (a) upon power - up and (b) after the receipt of the st op bit and the completion of any internal operations . memory reset: after an interruption in protocol, power loss or system reset, any two - wire part can be reset by following these steps: 1. clock up to 9 cycles. 2. look for sda high in each cycle while scl is high. 3. create a start condition. figure 1: data validity figure 2: start and stop definition
ec 24c02a/04a/08a/16a 2k/4k/8k/16k - bit 2 - wire serial cmos eeprom e - cmos corp. ( www.ecmos.com.tw ) page 6 of 18 5h06n - rev.f004 figure 3: output acknowledge device addressing the 2k, 4k , 8k and 16k eeprom devices all require an 8 - bit de vice address word following a start condition to enable the chip for a read or write operation (see to figure 4). the device address word consists of a mandatory "1", "0" sequence for the first four most significant bits as shown. this is common to all the serial eeprom devices. the next 3 bits are the a2, a1 and a0 device address bits for the 2k eeprom. these 3 bits must compare to their corresponding hard - wired input pins. the 4k eeprom uses the a2 and a1 device address bits with the third bit being a mem ory page address bit. the two device address bits must compare to their corresponding hard - wired input pins. the a0 (p0) pin is no connect ion . the 8k eeprom only uses the a2 device address bit with the next 2 bits being for memory page addressing. the a2 b it must compare to its corresponding hard - wired input pin. the a1 (p1) and a0 (p0) pins are no connect ions . the 16k does not use any device address bits but instead the 3 bits are used for memory page addressing. these page addressing bits on the 4k, 8k an d 16k devices should be considered the most significant bits of the data word address which follows. the a0 (p0) , a1 (p1) and a2 (p2) pins are no connect ions . the eighth bit of the device address is the read/write operation select bit. a read operation is initiated if this bit is high and a write operation is initiated if this bit is low. upon a compare of the device address, the eeprom will output a "0". if a compare is not made, the chip will return to a standby state. data security: the ec 24c 02a/04a/08 a/16a has a hardware data protection scheme that allows the user to write protect the entire memory when the wp pin is at v cc . write operations byte write: a write operation requires an 8 - bit data word address following the device address word and a cknowledgment. upon receipt of this address, the eeprom will again respond with a "0" and then clock in the first 8 - bit data word. following receipt of the 8 - bit data word, the eeprom will output a "0" and th e addressing device, such as a microcontroller, must terminate the write sequence with a stop condition. at this time the eeprom enters an internally timed write cycle, t wr , to the nonvolatile memory. all inputs are disabled
ec 24c02a/04a/08a/16a 2k/4k/8k/16k - bit 2 - wire serial cmos eeprom e - cmos corp. ( www.ecmos.com.tw ) page 7 of 18 5h06n - rev.f004 during this write cycle and the eeprom will not respond until the write is comp lete (see to figure 5). page write: the 2k eeprom is capable of an 8 - byte pag e write, and the 4k , 8k and 16k devices are capable of 16 - byte page writes. a page write is initiated the same as a byte write, but the microcontroller does not send a stop condi tion after th e first data word is clocked in instead, after the eeprom acknowledges receipt of the first data word, the microcontroller can transmit up to seven (2k) or fifteen (4k, 8k ,16k ) more data words. the eeprom will respond with a "0" after each dat a word received. the microcontroller must terminate the page write sequence with a stop condition (see to figure 6). the data word address lower three (2k) or four (4k, 8k , 16k ) bits are internally incremented following the receipt of each data word. the h igher data word address bits are not incremented, retaining the memory page row location. when the word address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the same page. if more than eight (2k) or six teen (4k, 8k , 16k ) data words are transmitted to the eeprom, the data word address will "roll over" and previous data will be overwritten. acknowledge polling: once the internally timed write cycle has started and the eeprom inputs are disabled, acknowl edge polling can be initiated. this involves sending a start condition followed by the device address word. the read/write bit is representative of the operation desired. only if the internal write cycle has completed will the eeprom respond with a "0", al lowing the read or write sequence to continue. figure 4: device address figure 5: byte write
ec 24c02a/04a/08a/16a 2k/4k/8k/16k - bit 2 - wire serial cmos eeprom e - cmos corp. ( www.ecmos.com.tw ) page 8 of 18 5h06n - rev.f004 figure 6: page write read operations read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to "1". there are three read operations: current address read, random address read and sequential read. current address read: the internal data word address counter maintains the last address a ccessed during the last read or write operation, incr eased by one. but for ec 24c16 a , only lower 8 bits of the internal data word address counter maintains the last address accessed , the higher 3 bits (p2, p1, p0) will follow the device address input at ea ch current address read. this address stays valid between operations as long as the chip power is maintained. the address "roll over" during read is from the last byte of the last memory page to the first byte of the first page. the address "roll over" dur ing write is from the last byte of the current page to the first byte of the same page. once the device address with the read/write select bit set to "1" is clocked in and acknowledged by the eeprom, the current address data word is serially clocked out. t he microcontroller does not respond with an input "0" but does generate a following stop condition (see to figure 7). random read: a random read requires a "dummy" byte write sequence to load in the data word address. once the device address word and da ta word address are clocked in and acknowledged by the eeprom, the microcontroller must generate another start condition. the microcontroller now initiates a current address read by sending a device address with the read/write select bit high. the eeprom a cknowledges the device address and serially clocks out the data word. the microcontroller does not respond with a "0" but does generate a following stop condition (see to figure 8). sequential read: sequential reads are initiated by either a current add ress read or a random address read. after the microcontroller receives a data word, it responds with an acknowledge. as long as the eeprom receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data w ords. when the memory address limit is reached, the data word address will "roll over" and the sequential read will continue. th e sequential read operation is terminated when the microcont roller does not respond with a "0" but does generate a following sto p condition (see to figure 9).
ec 24c02a/04a/08a/16a 2k/4k/8k/16k - bit 2 - wire serial cmos eeprom e - cmos corp. ( www.ecmos.com.tw ) page 9 of 18 5h06n - rev.f004 figure 7: current address read figure 8: random read figure 9: sequential read
ec 24c02a/04a/08a/16a 2k/4k/8k/16k - bit 2 - wire serial cmos eeprom e - cmos corp. ( www.ecmos.com.tw ) page 10 of 18 5h06n - rev.f004 electrical characteristics absolute maximum stress ratings dc supply voltage ------------------- ------------------------------------------------------------------- - 0.3v to +6.5v input / output voltage ----------------------------------------------------------------------------------- gnd - 0.3v to v cc +0.3v operatin g ambient temperature -------------- ---------------------------------------------- --------- - 40 c to +85 c storage temp erature ------------------------------------------------------------------------------------ - 65c to +15 0 c comments stresses above those listed under "absolute maximum ratings" may cause permanent damage to this device. these are stress ratings only. functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied or intended. exp osure to the absolute maximum rating conditions for extended periods may affect device reliability. d c e l ec t r i c a l c h a r a c t e r i s t i c s applicable over recommended operating range from: t a = - 40c to +85c, v cc = +1. 7 v to +5.5v (unless otherwise noted) parameter symbol min. typ. max. unit condition supply voltage v cc 1. 7 5.5 v supply current v cc = 5.0v i cc1 0.4 1.0 ma read at 4 00 khz supply current v cc = 5.0v i cc2 2.0 3.0 ma write at 4 00 khz standby current i sb 3 .0 a in = v cc or gnd input l eakage current i li 3.0 a in = v cc or gnd output leakage current i lo 0.05 3.0 a out = v cc or gnd input low level v il 1 - 0.3 v cc x 0.3 v v cc = 1.8v to 5.5v input high level v ih 1 v cc x 0.7 v cc + 0.3 v v cc = 1.8v to 5.5v input low level v il 2 - 0.3 v cc x 0. 2 v v cc = 1.7v input high level v ih 2 v cc x 0.7 v cc + 0.3 v v cc = 1.7v output low level v cc =5.0v v ol3 0.4 v i ol = 3.0 ma output low level v cc =3.0v v ol2 0.4 v i ol = 2.1 ma output low level v cc =1. 7 v v ol1 0.2 v i ol = 0.15 ma pin capaci tance applicable over recommended operating range from t a = 25c , f = 1.0 mhz, v cc = +1. 7 v parameter symbol min. typ. max. unit condition input/output capacitance (sda) c i/o - - 8 pf v i/o = 0v input capacitance (a0, a1, a2, scl) c in - - 6 pf v in = 0v
ec 24c02a/04a/08a/16a 2k/4k/8k/16k - bit 2 - wire serial cmos eeprom e - cmos corp. ( www.ecmos.com.tw ) page 11 of 18 5h06n - rev.f004 ac electrical characteristics applicable over recommended operating range from t a = - 40c to +85c, v cc = +1. 7 v to +5.5v, c l = 1 ttl gate and 100 pf (unless otherwise noted) parameter symbol 1.7v Q v cc < 2.5v 2.5v Q v cc Q 5.5v units min. t yp. max. min. typ. max. clock frequency, scl f scl - - 400 - - 1000 khz clock pulse width low t low 1.2 - - 0.6 - - s high 0.6 - - 0.4 - - s i - - 50 - - 40 ns clock low to data out valid t aa 0.05 - 0.9 0.05 - 0.55 s buf 1.2 - - 0.5 - - s hd.sta 0.6 - - 0.25 - - s su.sta 0.6 - - 0.25 - - s hd.dat 0 - - 0 - - s su.dat 100 - - 100 - - ns inputs rise time(1) t r - - 0.3 - - 0.3 s f - - 300 - - 100 ns stop setup time t su.sto 0.6 - - 0.25 - - s dh 50 - - 50 - - ns write cycle time t wr - 1.5 5 - 1.5 5 ms 5.0v, 25c, by te mode endurance 1m - - - - - write cycles note 1. this parameter is characterized and is not 100% tested. 2. ac measurement conditions: r l (connects to v cc ): 1.3k (2.5v, 5v), 10k (1 cc to 0.7 x v cc input r ise and fall time: Q cc the value of r l should be concerned according to the actual loading on the user's system.
ec 24c02a/04a/08a/16a 2k/4k/8k/16k - bit 2 - wire serial cmos eeprom e - cmos corp. ( www.ecmos.com.tw ) page 12 of 18 5h06n - rev.f004 bus timing figure 10: scl: serial clock, sda: serial d ata i/o write cycle timing figure 11: scl: serial clock, sda: serial data i/o note 1. the write cycle time t wr is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle.
ec 24c02a/04a/08a/16a 2k/4k/8k/16k - bit 2 - wire serial cmos eeprom e - cmos corp. ( www.ecmos.com.tw ) page 13 of 18 5h06n - rev.f004 mec hanical dimensions outline dr a wing pdip - 8 available package types : ec24c02a/04a/08a/16a top view side view section b - b end view common dimensions (unit of measure = mm) symbol min max a 3.60 4.00 a1 0.51 - a2 3.10 3.50 a3 1.50 1.70 b 0.44 0.53 b1 0.43 0.48 b 1.52 bsc c 0.25 0.31 c1 0.24 0.26 d 9.05 9.45 e1 6.15 6.55 e 2.54 bsc ea 7.62 bsc eb 7.62 9.50 ec 0 0.94 l 3.00 -
ec 24c02a/04a/08a/16a 2k/4k/8k/16k - bit 2 - wire serial cmos eeprom e - cmos corp. ( www.ecmos.com.tw ) page 14 of 18 5h06n - rev.f004 mechanical dimensions outline dr a wing sop - 8 available package types ec24c02a/04a/08a/16a top view end view side view common dimensions (unit of measure = mm) symbol min max a 1.35 1.75 a1 0.10 0.25 b 0.31 0.51 c 0.17 0.25 d 4.70 5.10 e1 3.80 4.00 e 5.79 6.20 e 1.27 bsc l 0.40 1. 27 0 8
ec 24c02a/04a/08a/16a 2k/4k/8k/16k - bit 2 - wire serial cmos eeprom e - cmos corp. ( www.ecmos.com.tw ) page 15 of 18 5h06n - rev.f004 mechanical dimensions outline dr a wing tssop - 8 available package types d 2.80 3.20 e 6.20 6.60 e1 4.20 4.60 a - 1.20 a2 0.80 1.15 b 0.19 0.30 e 0.65 bsc l 0.45 0.75 l1 1.00 bsc 0 8
ec 24c02a/04a/08a/16a 2k/4k/8k/16k - bit 2 - wire serial cmos eeprom e - cmos corp. ( www.ecmos.com.tw ) page 16 of 18 5h06n - rev.f004 mechanical dimensio ns outline drawing dfn - 8 available package types ec24c02a/04a/08a/16a top view end view side view bottom view common dimensions (unit of measure = mm) symbol min max a 0.70 0.80 a1 - 0.05 b 0.18 0.30 c 0.18 0.25 d 1.90 2.10 d2 1.50 ref e 0.50 bsc nd 1.50 bsc e 2.90 3.10 e2 1.60 bsc l 0.30 0.50 h 0.20 0.30
ec 24c02a/04a/08a/16a 2k/4k/8k/16k - bit 2 - wire serial cmos eeprom e - cmos corp. ( www.ecmos.com.tw ) page 17 of 18 5h06n - rev.f004 mechanical dimensions outline drawing msop - 8 available package types : ec24c02a/04a/ 08a/16a top view side view section b - b end view common dimension s (unit of measure = mm) symbol min max a - 1.10 a1 0.05 0.15 a2 0.75 0.95 a3 0.30 0.40 b 0.29 0.38 b1 0.28 0.33 c 0.15 0.20 c1 0.14 0.16 d 2.90 3.10 e 4.70 5.10 e1 2.90 3.10 e 0.65 bsc l 0.40 0.70 l1 0.95 bsc 0 8
ec 24c02a/04a/08a/16a 2k/4k/8k/16k - bit 2 - wire serial cmos eeprom e - cmos corp. ( www.ecmos.com.tw ) page 18 of 18 5h06n - rev.f004 mechanical dimensions outline drawing sot23 - 5 available p ackage types ec24c02a/04a/08a top view end view side view section b - b common dimensions (unit of measure = mm) symbol min max a 1.05 1.30 a1 0 0.10 a2 1.00 1.20 a3 0.55 0.75 b 0.30 0.50 b1 0.33 0.38 c 0.10 0.21 c1 0.14 0.16 d 2.72 3.12 e 2.60 3.00 e1 1.40 1.80 e 0.95 bsc l 0.30 0.60 0 8

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